AN840/1095 1/6 application note coded lock using the st6-realizer introduction the trend is to provide more and more applications with security features. this is requested to insure data confidentiality, access control, or simply user identificat ion. non volatile memory is usually required to store the identification or secret code. with the embedded eeprom provided on the st62 mcu, one- chip solutions can be achieved with the as socia ted cost and density advantages. a coded lock system has been developed with the st6-realizer environment and is described in this note. this development tool is used to get an automatic generation of the application software. by olivier rouy
2/6 coded lock using the st6-realizer 1 application overview the application described here consists of a coded lock for a door. a secret code is loaded into the lock system to allow the door to be unlocked only if the same access code is entered. when loaded, the secret code is stored in the non-volatile memory ( eeprom) embedded in the st62 mcu. this ensures that the data is retained even after a voltage cut-off and insures the security is maintained along the time. the application provides the following features: C secret code recording (3 digits). C recognition of entered access code. C door lock control. all the featured functions of the system are managed in the final application under software control by the mcu. however, using the st6-realizer allows this application software to be generated by a functional description of the system. thus the software development can be achieved by a system oriented or hard- ware like description. only the core of the application, the secret code storage in eeprom and the code recognition, are de- scribed as a generic base for various applications. any kind of user interface could be used (keyboard, ir or rf solution for instance), while the output signal can activate any kind of circuit. in the present case, it is assumed that the user interface provides the following 4 inputs: C digit reception flag C digit value (0..9) C change secret code C lock the door the digits used for the code are serially received, announced by the activation of a flag. 2 practical realisation 2.1 functional description by restricting the application description to its core (the operations sequencing, the secret code storage in the eeprom and the code recognition), the resulting application block diagram is represented in figure 1 figure 1. block diagram of the coded door lock lock the door change secret code digit reception flag digit value to door locking system sequencing control eeprom code recognition vr02063 from user interface
3/6 coded lock using the st6-realizer 2.1.1 sequencing control the most important feature is the sequencing control of all the operations. two main items must be con- sidered: the transition between the different working modes (door locked, a ccess code entry, door un- locked and secret code entry) and the management of the serial flow of the numeric values received through the user interface. the transition between the working modes follows conditional rules des cribed in the st6-realizer with the help of a state-machine as described in figure 2 where four states are existing: C door locked C code recognition C door unlocked C secret code entry figure 2. state machine description for sequencing control the conditional occurrences are generated either through the user interface ( lock, change secret code) , or through some functional sub-blocks of the application ( one digit received, right code, wrong code, last digit ). for instance, the occurrence of the condition one digit received in the door locked state initi- ates the process code recognition. the management of the serial flow of the digits entered (0..9) is achieved with a counter of received digits (figure 3). depending whether it is the 1st, the 2nd or the 3rd digit (in the case of a 3 digit code), the nu- meric value issued by the interface is stored in the associated memory location. when the 3rd digit is re- ceived, the counter is reset. in addition, the reception flags of the 1st digit and 3rd digit are used in the state-machine to initiate respectively the code recognition and conclude the secret code entry.
4/6 coded lock using the st6-realizer figure 3. management of the digits reception 2.1.2 secret code storage in the eeprom thanks to the st6-realizer, the eeprom non volatile memory can be managed as a standard bista- ble component: r/s latch, d latch, shift register or counter. in the present case, each eeprom location is symbolised by a specific d latch component providing the non volatility feature. this com ponent, provided within the st6-realizer library, has the advantage of being multitype. this means the same symbol can be used whatever the input type: bit, byte, word, inte- ger or signed variable. in the present case, the data input comes directly from the interface as the digit value, in one byte. the number of d latches must be equal to the number of digits used for the secret code, 3 in the present case. there is a specific clock for each of the 3 d latches, controlled by the sequencing control module. data can be written (clock activated) into a d latch only if the active mode is secret code entry, and if the re- ceived bit corresponds to this location (figure 4). practical ly, the clock is generated through an and f unc- tion between the secret code entry mode and the ranking of the received digit. this ranking is issued by the counter used for the serial flow reception. figure 4. digit storage into eeprom memory
5/6 coded lock using the st6-realizer 2.1.3 access code entry and recognition the digits are received serially as in the secret code entry mode, and stored in volatile memory locations (ram). the ram location are described with standard d latch symbols. the input/output of this compo- nent are exactly the same as for the non volatile one allowing a clear analogy between the functional de- scription of the two modules. the data input channel is the same while the clocks are logically al ways val- idated except if the secret code entry mode is activated (figure 5). figure 5. digits management for code recognition. the code recognition is performed by comparison one-to-one between the values stored in eeprom and ram.
6/6 coded lock using the st6-realizer notes: information furnished is believed to be accurate and reliable. however, sgs-thomson microelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of sgs-thomson microelectronics. specifications mentioned in this publication are subject to change without notice. this publication supersedes and replaces all information previously supplied. sgs-thomson microelectronics products are not authorized for use as critical components in life support devices or systems without the express written approval of sgs-thomson microelectronics. ?the realizer is a registered trademark of actum solutions ?19 95 sgs-thomson microelectronics - all rights reserved. purchase of i 2 c components by sgs-thomson microe lectronics conveys a license under the philips i 2 c patent. rights to use these components in an i 2 c system is gra nted provided that the system conforms to the i 2 c standard specification as d efined by philips. sgs-thomson microelectronics group of companies australia - brazil - china - france - germany - hong kong - italy - japan - korea - malaysia - malta - morocco - the nether lands - singapore - spain - sweden - switzerland - taiwan - thailand - united kingdom - u.s.a.
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